Forth Day 2010 Meeting Notes
Compiled by Dave Jaffe
Contributions from Kevin Appert and others
Forth Day videos are posted
here.
Forth Day photos are posted
here.
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08:30 |
Coffee and a Chat |
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09:00 |
Chairman's Welcome - George Perry |
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09:10 |
eP32 on the Lattice XP2 Brevia Development Kit - CH
Ting
Lattice is selling the XP2 Brevia Development FPGA kit for $29.
Ting is working on porting eP32 to this kit, and will report on his progress.
The FPGA synthesis, programming, and simulation tools are very different from
the familiar ones provided by Xilinx and Altera, so he'll be experiencing the
challenges of implementing a Forth engine on this new platform.
- Slides - 256 Kb pdf file
- Lattice
XP2 Brevia Development FPGA
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09:40 |
Low Cost Netbooks - Bill Kibler
- Video
- 7"
TFT LCD Windows CE 6.0 ARM CPU WiFi UMPC Netbook - $87.40
- M001
7" Touch Screen TFT LCD Google Android 1.6 Tablet PC w/ WiFi (VIA
MW8505/600MHz)
- Kibler
Electronics
- Forth
Projects
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09:55 |
Follow Up to "OO Extensions Considered Harmful" -
Samuel A. Falvo II
The plurality of Object Oriented extensions makes
reusing 3rd-party packages unnecessarily complex. Sam will show another coding
pattern illustrating how you can write reusable components in plain Forth, with
surprising results suggesting it's actually more powerful and even more
reusable than what object orientation provides.
- Slides - 882 Kb pdf file
- Game
source code
- Sam's
blog
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10:25 |
Update: Porting Gforth to eCos - John E.
Harbold
John has been able to get Redboot to boot under an i386 KVM
virtual environment. Now he's analyzing the Gforth engine to see how to
"shoe-horn" it into the eCos source tree.
- Slides - 66.7 Kb pdf
file
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10:35 |
Break |
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10:50 |
J1: A Small Forth CPU Core for FPGAs - James
Bowman
James will describe a 16-bit Forth CPU core, intended for FPGAs.
The instruction set closely matches the Forth programming language, simplifying
cross-compilation. Because it has higher throughput than comparable CPU cores,
it can stream uncompressed video over Ethernet using a simple software loop.
The entire system (source Verilog, cross compiler, and TCP/IP networking code)
is published under the BSD license. The core is less than 200 lines of Verilog,
and operates reliably at 80 MHz in a Xilinx Spartan(R)-3E FPGA, delivering
approximately 100 ANS Forth MIPS.
- Slides - 813 Kb pdf
file
- The J1
Forth CPU
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11:20 |
Introducing SwiftCore - Brad Eckert and Leon
Wagner
The SwiftCore SC20 is a 32-bit soft CPU designed for SoC
applications. Its architecture is equally at home in ASICs and FPGAs, and is
compatible with FPGA block RAMs. The instruction set architecture (ISA) is
stack oriented and close to native Forth, so it doesn't need a sophisticated
optimizer for high performance. The ISA also supports signed and unsigned
8-bit, 16-bit, and 32-bit data types with base+offset addressing modes, frame
stacks, and temporary registers. We will demonstrate an instantiation of the
SC20 on the Lattice XP2 Brevia development kit along with the interactive
SwiftX cross compiler.
- Slides - 126 Kb pdf
file
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Noon |
Forth Day BBQ - CH Ting
Lunch in the Peterson
Building courtyard, catered by CH Ting |
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13:30 |
Update on GreenArrays - Staff
- Introduction, Status, and Plans - Greg Bailey
- Slides - 431 Kb pdf
file
- Using S40 to Build Mobile Robot Vision - Michael
Montvelishsky
- Slides - 1.57 Mb
pdf file
- Development Cycle Overview - Jeff Fox
- Slides - 276 Kb pdf
file
- Break
- Softsim & Testbeds - Charley Shattuck
- Slides - 142 Kb pdf
file
- Degugging - Jeff Fox
- Slides - 354 Kb pdf
file
- Chip Testing - Steven Hsu
- Slides - 255 Kb pdf
file
- Green Arrays Discount Coupons good for $50 toward purchase of
any GreenArrays products were distibuted. Nine additional coupons are still
available. If you are interested in obtaining one, pick it up at the next SVFIG
meeting. They are personally signed by Chuck Moore and Greg Bailey.
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16:00 |
Fireside Chat - Chuck Moore |
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17:00 |
Cleanup and Adjourn |
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18:00 |
Banquet Dinner at Su
Hong in Menlo Park |
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Other items:
- Forth
- A
Forth HTML Generator
- Redcode
Forth Interpreter - used in Code War game
- Software
- QNX
Publishes Neutrino Source Code and Opens Development Process
- MIXAL
- MIX on
Wikipedia
- Hardware
-
ARM prototyping on-the-cheap with STM32 Discovery
- GreenArrays
EVB001 Evaluation Board
- FT2232D
Dual USB to Serial UART/FIFO IC
- DLP-2232ML-G
Low-Profile USB Module
- Books
- Bell System Technical
Journal, 1922-1983
- Stores
- Games
- Core Wars
- Core Wars
source code in Forth
- Core War on
Wikipedia
- Companies
- Forth Jobs
- Embedded
Systems Programmer
- Lab
Technician - 2nd Shift
- Course lectures
- Elements
of Programming - Paul McJones & Alexander Stepanov - (video)
- Other
- Dr Dobbs on
DVD
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